The device

The programmable maxx GW4102 mobile communication gateway for industrial applications collects and processes the information from your devices, machines and sensors, and transmits it via the expanded LTE network. The PLC I/O interface expansion enhances the basic unit with 16 isolated digital inputs and four isolated digital outputs. The inputs are divided into four groups of four inputs with a common negative terminal for each group.

This constellation allows the connection of up to four devices (e.g. PLCs) with minimal wiring effort while keeping each device isolated from each other.

The maxx GW4102 gateway is therefore ideal for transmitting measurements from the field to the head office or the cloud.

Interfaces

The following section describes the various interfaces of the GW4102 in detail. This graphic shows the distribution of the interfaces:

Pinout isolated outputs

Typ	Signal	Pin	Pin	Signal
isolated outputs	ISO_OUT_A0	1	2	ISO_OUT_A1
	ISO_OUT_B0	3	4	ISO_OUT_B1
	ISO_OUT_B0	5	6	ISO_OUT_B1
	ISO_OUT_A2	7	8	ISO_OUT_A3
	ISO_OUT_B2	9	10	ISO_OUT_B3

Pinout isolated inputs group A

Typ	Signal	Pin	Pin	Signal
isolated inputs group A	ISO_IN_A_P0	1	2	ISO_IN_A_P1
	ISO_IN_A_P2	3	4	ISO_IN_A_P3
	ISO_IN_B_N	5	6	ISO_IN_A_N

Pinout isolated inputs group B

Typ	Signal	Pin	Pin	Signal
isolated inputs group B	ISO_IN_B_P0	1	2	ISO_IN_B_P1
	ISO_IN_B_P2	3	4	ISO_IN_B_P3
	ISO_IN_C_N	5	6	ISO_IN_B_N

Pinout isolated inputs group C

Typ	Signal	Pin	Pin	Signal
isolated inputs group C	ISO_IN_C_P0	1	2	ISO_IN_C_P1
	ISO_IN_C_P2	3	4	ISO_IN_C_P3
	ISO_IN_D_N	5	6	ISO_IN_C_N

Pinout isolated inputs group D

Typ	Signal	Pin	Pin	Signal
isolated inputs group D	ISO_IN_D_P0	1	2	ISO_IN_D_P1
	ISO_IN_D_P2	3	4	ISO_IN_D_P3
	NC	5	6	ISO_IN_D_N

isolated inputs

The following picture shows the simplified architecture one of the four isolated inputs with internal current limit and temperature stabilized threshold. Internally the isolation is achieved by the use of a TLP293 optocoupler.

Cascading inputs

Each group of four inputs features a common negative terminal to reduce wiring effort. Furthermore the groups can be cascaded as shown in the following diagrams. Other configurations following the same method are possible.

4x4 configuration

2x8 configuration

1x16 configuration

isolated outputs

The device contains two Panasonic AQW282 solid state relais to realize four independent isolated outputs. As there is no internal current limitation the user is responsible for ensuring a current flow of max. 300mA.

Cascading outputs

4x1 configuration

2x2 configuration

3+1 configuration

Linux mapping

Digital and analog I/Os (deprecated sysfs mapping)

Pin	Linux mapping	Typ
ISO_IN_A0	/sys/class/gpio175	isolated digital inputs
ISO_IN_A1	/sys/class/gpio178
ISO_IN_A2	/sys/class/gpio174
ISO_IN_A3	/sys/class/gpio173
ISO_IN_B0	/sys/class/gpio177
ISO_IN_B1	/sys/class/gpio176
ISO_IN_B2	/sys/class/gpio172
ISO_IN_B3	/sys/class/gpio197
ISO_IN_C0	/sys/class/gpio203
ISO_IN_C1	/sys/class/gpio194
ISO_IN_C2	/sys/class/gpio198
ISO_IN_C3	/sys/class/gpio205
ISO_IN_D0	/sys/class/gpio67
ISO_IN_D1	/sys/class/gpio202
ISO_IN_D2	/sys/class/gpio65
ISO_IN_D3	/sys/class/gpio66
ISO_OUT0	/sys/class/gpio182	isolated digital outputs
ISO_OUT1	/sys/class/gpio180
ISO_OUT2	/sys/class/gpio179
ISO_OUT3	/sys/class/gpio181

Digital and analog I/Os (new libgpiod mapping)

Pin	Linux mapping	line	Typ
ISO_IN_A0	gpiochips5	line 15	isolated digital inputs
ISO_IN_A1	gpiochip5	line 18
ISO_IN_A2	gpiochip5	line 14
ISO_IN_A3	gpiochip5	line 13
ISO_IN_B0	gpiochip5	line 17
ISO_IN_B1	gpiochip5	line 16
ISO_IN_B2	gpiochip5	line 12
ISO_IN_B3	gpiochip6	line 5
ISO_IN_C0	gpiochip6	line 11
ISO_IN_C1	gpiochip6	line 2
ISO_IN-C2	gpiochip6	line 6
ISO_IN_C3	gpiochip6	line 13
ISO_IN_D0	gpiochip2	line 3
ISO_IN_D1	gpiochip6	line 10
ISO_IN_D2	gpiochip2	line 1
ISO_IN_D3	gpiochip2	line 2
ISO_OUT0	gpiochip5	line 22	isolated digital outputs
ISO_OUT1	gpiochip5	line 20
ISO_OUT2	gpiochip5	line 19
ISO_OUT3	gpiochip5	line 21

Maxx GW4102